Characterization & Optimization of 32nm P-Channel MOSFET Device

Nasaruddin Mohammad, F. Salehuddin, H.A Elgomati, I. Ahmad, N. Amizan Abd Rahman, Maria Mansor, Zulkifli Mansor, K.E. Kaharudin, A.S Mohd Zain, N.Z Haron

Abstract


In this paper, effect of the process parameters variation on response characteristics such as threshold voltage (VTH) in 32nm p-channel Metal-Oxide Semiconductor Field Effect Transistor (MOSFET) device was investigated. An orthogonal array, signal-to noise (S/N) ratio and analysis of variance were employed to studythe performance characteristics of the p-channel device. The control factors were used in this research are oxide growth temperature, VTH implant energy, Source/Drain (S/D) implant dose and compensation implant energy. The fabrication of the transistor device was performed using TCAD simulator, consisting of a process simulator, ATHENA and device simulator, ATLAS. The results were then subjected to the Taguchi method to determine the optimal process parameters and to produce predicted values. In pchannel device, VTHimplant energy (57%) was identified as one of the control factor that has the strongest effect on the threshold voltage.The result shows that the VTHvalue has least variance and percent different from the target value (-0.289V) for this device is 3.11% (-0.280V). As conclusions, setting up design of experiment with the Taguchi Method of L9 orthogonal arrays and TCAD simulator, the optimal solution for the robust design recipe of 32nm p-channel device was successfully achieved.

Keywords


threshold voltage; p-channel; L9 orthogonal array; Taguchi method

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ISSN: 2180-1843

eISSN: 2289-8131