Three-Dimensional Topology based on Modified Diagonal Mesh Interconnection Network

Akash Punhani, Pardeep Kumar, Nitin Nitin


Interconnection Network is the key component of the digital system. The numbers of cores are increasing on the single chip, which led to the introduction of layered based concept in the System on Chips. Various topologies suggested in the past were based on the 3-dimensional layouts. In this paper, we have proposed using the modified Diagonal mesh topology for defining the single layer of the topology. The proposed topology has been tested on the various traffic patterns like a uniform, bit complement, neighbor, tornado, bit traversal and bit reversal traffic. The performance of the proposed topology was better in the bit reversal traffic. The topology was found to be comparable to other threedimensional topologies on the uniform, and tornado traffic. The performance of the topology was less in comparison to other topologies in the case of other traffic. Based on the analysis of results it can be observed, we can use the topology in the applications where traffic is following the pattern of the form bit reversal.


Latency; Mesh Interconnection Network; Network Traffics; Throughput;

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